#dbuPerUU                          "0"
#hierDepth                         "32767"
#maxCellsInTargetLib               "20000"
#numThreads                        "1"
#strmTextNS                        "cdba"
#append
#arrayInstToScalar
attachTechFileOfLib                "cmrf8sf"
case                               "preserve"
cellMap                            ""
#checkPolygon
#convertPathToPathSeg
#detectVias
#disableLocking
excludeMapToVia                    ""
fontMap                            ""
#ignoreBoxes
#ignoreZeroWidthPath
#keepStreamCells
labelCase                          "preserve"
layerMap                           "/net/plato.ee.Virginia.EDU/users/bengroup/workspace/alicia/tutorials/cadence/../../../../libs/yq_IBM130_SynthesisFiles/cds2gds.map"
library                            "mem_ctrlr_core"
loadTechFile                       ""
logFile                            "strmIn.log"
#mergeUndefPurposToDrawing
noInfo                             ""
#noOverwriteCell
noWarn                             ""
objectMap                          ""
pinAttNum                          "0"
propMap                            ""
propSeparator                      ","
refLibList                         ""
replaceBusBitChar
#reportPrecisionLoss
runDir                             "."
scaleTextHeight                    "1.00000"
#skipUndefinedLPP
#snapToGrid
strmFile                           "/net/plato.ee.Virginia.EDU/users/bengroup/workspace/alicia/tutorials/blockSynthesis/enc/mem_ctrlr_core/mem_ctrlr_core.gds"
strmTechGen                        ""
summaryFile                        ""
techRefs                           ""
topCell                            "mem_ctrlr_core"
#translateNode
userSkillFile                      ""
viaMap                             ""
view                               "layout"
warnToErr                          ""
